TI LM317 in TO-220 ("LM317T"): Adjustable 1.5 A Regulator Datasheet Notes

Status
Part family
Datasheet
Texas Instruments LM317 in TO-220 (TI orderable LM317KCS; "LM317T" is not a TI order code) datasheet

Answer: “LM317T” is the common name for an LM317 in a 3-pin TO-220. TI does not use that order code: TI’s TO-220 orderable is LM317KCS (status NRND, tube of 50). The SOT-223 (LM317DCY/DCYR) and TO-263 (LM317KTTR) versions are Active. Pinout: 1 ADJUST, 2 OUTPUT (and tab), 3 INPUT. VOUT = 1.25 V × (1 + R2/R1) + IADJ × R2, from 1.25 V to 37 V, up to 1.5 A. (TI SLVS044Z pp.1, 5, 6, 16; Package Option Addendum p.1.)

Key specifications

ParameterValueConditionSource
Reference voltage VREF1.2 / 1.25 / 1.3 V3 V ≤ VIN − VOUT ≤ 40 V, 10 mA ≤ IOUT ≤ 1.5 A, PD ≤ 20 W; 1.25 V typ at TJ = 25 °Cp.8 §6.6 Electrical Characteristics
Adjustment pin current IADJ50 typ / 100 max µAFull operating temperature rangep.8 §6.6
IADJ change0.2 typ / 5 max µA10 mA ≤ IOUT ≤ IMAX, 3 V ≤ VIN − VOUT ≤ 40 Vp.8 §6.6
Minimum load current3.5 typ / 10 max mAVIN − VOUT = 40 V, full temperature rangep.8 §6.6
Current limit1.5 min / 2.2 typ A (VIN − VOUT ≤ 15 V); 0.15 min / 0.4 typ A (40 V, TJ = 25 °C)PD < PMAXp.8 §6.6
Line regulation0.01 typ / 0.04 max %/V (TJ = 25 °C); 0.02 / 0.07 %/V full range3 V ≤ VIN − VOUT ≤ 40 Vp.8 §6.6
Load regulation (legacy chip, VO ≥ 5 V)0.1 typ / 0.5 max %VO at 25 °C; 0.3 / 1.5 %VO at 0–125 °CIO = 10 mA to 1.5 Ap.8 §6.6
Ripple rejection (legacy chip)57 dB typ (CADJ = 0); 62 min / 64 typ dB (CADJ = 10 µF)VOUT = 10 V, f = 120 Hzp.8 §6.6
Input-to-output differential3 to 40 V recommended; −0.3 to 40 V absolute maximum—p.6 §6.1, §6.3
Output voltage / current1.25 to 37 V; 0.01 to 1.5 ARecommended operating conditionsp.6 §6.3
Junction temperature0 to 125 °C recommended; legacy chip absolute max −65 to 150 °C—p.6 §6.1, §6.3
Thermal resistance TO-220 (legacy chip)RθJA 23.5 °C/W (KCS) / 37.9 °C/W (KCT); RθJC(bot) 0.1 / 4.2 °C/WJEDEC metricsp.7 §6.4
TI TO-220 orderableLM317KCS (also LM317KCS.A, LM317KCSE3): NRND, tube of 50, marking LM317, 0 to 125 °CNo KCT orderable in the addendumPackage Option Addendum p.1 (PDF p.30)

What “LM317T” means and what TI actually sells

The suffix “T” for TO-220 comes from other makers’ naming. In TI’s April 2025 datasheet the TO-220 options are package codes KCS and KCT, both “legacy chip” (p.1). The Package Option Addendum lists only:

Orderable (TI)PackageStatusPackMarking
LM317KCS, LM317KCS.A, LM317KCSE3TO-220 (KCS), 3 pinsNRNDTube, 50LM317
LM317DCY / LM317DCYR (+ .A/.B/G3)SOT-223 (DCY), 4 pinsActiveTube 80 / reel 2500L3
LM317KTTR (+ .A/.B/G3)TO-263 (KTT), 3 pinsActiveReel, 500LM317

(Addendum p.1, PDF p.30.) There is no KCT orderable in the addendum, even though the datasheet gives KCT thermal data. That is why this is a family page rather than a single-part page. For a TO-220 from other makers (ST, onsemi and others), see LM317 alternatives.

Pinout

PinTO-220 (KCS/KCT)TO-263 (KTT)SOT-223 (DCY)
1ADJUSTADJUSTADJUST
2OUTPUTOUTPUTOUTPUT
3INPUTINPUTINPUT
TabOUTPUTOUTPUTOUTPUT (pin 4)

(p.5, Pin Functions.) The tab is the output, so it is live: insulate a TO-220 from a grounded heat sink.

Setting the output

Equation 2 (p.16): VO = VREF × (1 + R2/R1) + IADJ × R2, with VREF = 1.25 V typ and IADJ = 50 µA typ.

Worked example for 12 V with TI’s R1 = 240 Ω: R2 = 2.05 kΩ (E96) gives 12.03 V typical. At the datasheet limits (VREF 1.2–1.3 V, IADJ 0–100 µA) the same pair spans 11.45–12.61 V. Trim R2 or use 1 % resistors if you need better.

For a current source, put a single resistor between OUTPUT and ADJUST: R = 1.25 V / IO, rated above (1.25 V)² / R (§7.3.3, p.13).

Minimum load: the 240 Ω trap

The minimum load is 3.5 mA typ and 10 mA max (p.8). With R1 = 240 Ω the divider draws only 1.25 / 240 = 5.2 mA, enough for a typical part but not the guaranteed maximum. If the real load can drop to zero, either use R1 ≤ 125 Ω (10 mA) or make sure the load always draws the difference (§7.4.3, p.14).

Headroom and dropout

TI recommends 3 V of headroom (VIN − VOUT) for full current at the lowest temperature (§7.3.1, p.13; §7.4.2, p.14). The datasheet gives dropout only as typical curves; there is no guaranteed dropout value in the Electrical Characteristics, so this page quotes none. Design to the 3 V figure.

Capacitors and protection diodes (p.15)

Heat

PD = (VIN − VOUT) × IL + VIN × IG (Equation 9, p.23). Required RθJA = (TJ(max) − TA(max)) / PD (Equations 10–11), and a heat sink needs θHA ≤ RθJA − (θCH + RθJC) (Equation 12, p.24).

Example: 15 V in, 5 V out, 1 A is about 10 W. With TJ 125 °C and TA 40 °C the whole path must be ≤ 8.5 °C/W, far below even the 23.5 °C/W JEDEC figure for KCS. A heat sink is mandatory.

Pitfalls specific to the LM317 in TO-220

  1. Ordering “LM317T” from TI. That code doesn’t exist at TI; the TO-220 is LM317KCS, which is NRND (Addendum p.1).
  2. Mounting the tab directly on a grounded chassis. The tab is OUTPUT (p.5).
  3. Copying the 240 Ω divider for a circuit with no load. 5.2 mA is below the 10 mA guaranteed minimum (p.8).
  4. Running with 1–2 V of headroom and expecting 1.5 A. TI specifies everything from 3 V up (pp.6, 8, 13).
  5. Assuming 1.5 A at high input-output voltage. The guaranteed limit falls to 0.15 A at 40 V (p.8).
  6. Swapping in a “new chip” thermal number. TO-220 exists only as the legacy chip, so use the §6.4 values, not §6.5 (p.7).

FAQ

Sources (retrieved 2026-10-26)

Disclaimer

Values are copied from TI SLVS044Z (revised April 2025) and its Package Option Addendum, read on 26 Oct 2026. TO-220 data are for the TI legacy chip; other makers’ “LM317T” parts have their own datasheets. Lifecycle status (NRND) can change, so check TI before ordering.

Reviewed by: Jasper · Updated: 2026-10-26

Parameters

Parameter Value Source Verified
Reference voltage VREF 1.2 / 1.25 / 1.3 V (3 V ≤ VIN − VOUT ≤ 40 V, 10 mA ≤ IOUT ≤ 1.5 A, PD ≤ 20 W; 1.25 V typ at TJ = 25 °C) Source 2026-10-26
Adjustment pin current IADJ 50 typ / 100 max µA (Full operating temperature range) Source 2026-10-26
IADJ change 0.2 typ / 5 max µA (10 mA ≤ IOUT ≤ IMAX, 3 V ≤ VIN − VOUT ≤ 40 V) Source 2026-10-26
Minimum load current 3.5 typ / 10 max mA (VIN − VOUT = 40 V, full temperature range) Source 2026-10-26
Current limit 1.5 min / 2.2 typ A (VIN − VOUT ≤ 15 V); 0.15 min / 0.4 typ A (40 V, TJ = 25 °C) (PD < PMAX) Source 2026-10-26
Line regulation 0.01 typ / 0.04 max %/V (TJ = 25 °C); 0.02 / 0.07 %/V full range (3 V ≤ VIN − VOUT ≤ 40 V) Source 2026-10-26
Load regulation (legacy chip, VO ≥ 5 V) 0.1 typ / 0.5 max %VO at 25 °C; 0.3 / 1.5 %VO at 0–125 °C (IO = 10 mA to 1.5 A) Source 2026-10-26
Ripple rejection (legacy chip) 57 dB typ (CADJ = 0); 62 min / 64 typ dB (CADJ = 10 µF) (VOUT = 10 V, f = 120 Hz) Source 2026-10-26
Input-to-output differential 3 to 40 V recommended; −0.3 to 40 V absolute maximum Source 2026-10-26
Output voltage / current 1.25 to 37 V; 0.01 to 1.5 A (Recommended operating conditions) Source 2026-10-26
Junction temperature 0 to 125 °C recommended; legacy chip absolute max −65 to 150 °C Source 2026-10-26
Thermal resistance TO-220 (legacy chip) RθJA 23.5 °C/W (KCS) / 37.9 °C/W (KCT); RθJC(bot) 0.1 / 4.2 °C/W (JEDEC metrics) Source 2026-10-26
TI TO-220 orderable LM317KCS (also LM317KCS.A, LM317KCSE3): NRND, tube of 50, marking LM317, 0 to 125 °C (No KCT orderable in the addendum) Source 2026-10-26

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